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GP-EC-14MY5XPElectronicsOpen for request

MATLAB digital PLL simulator

A MATLAB and Simulink project for analysing acquisition, tracking, jitter, cycle slips, and stability in a configurable digital phase-locked loop.

  • MATLAB R2026a
  • Simulink R2026a

Software compatibility

MATLAB R2026a and Simulink only

Requires the buyer's own licensed MATLAB R2026a and Simulink R2026a installation. The delivered models are not GNU Octave compatible.

Project definition

Problem statement

A digital PLL must acquire and track phase and frequency while noise, delay, quantisation, loop bandwidth, and initial offset affect stability and jitter.

Project objectives

  • Model a selected digital phase detector, loop filter, controlled oscillator, and divider.
  • Derive and compare the linear closed-loop approximation with nonlinear simulation.
  • Measure acquisition time, settling, steady error, jitter, and cycle-slip behaviour.
  • Sweep loop bandwidth, damping, sampling rate, noise, and frequency offset.
  • Verify selected cases against analytical predictions.

System design

System modules

01

Loop model

Implements phase detector, filter, oscillator, divider, quantisation, and sample timing.

02

Linear analyser

Calculates loop gain, poles, bandwidth, damping, and predicted transient behaviour.

03

Nonlinear simulator

Runs Simulink acquisition and tracking with wrapping, saturation, noise, and offsets.

04

Lock detector

Applies documented phase-error and duration rules to determine acquisition and loss of lock.

05

Sweep analyser

Compares transient, jitter, stability, cycle slips, and parameter tradeoffs.

Methodology

System workflow

  1. 01
    Define loop

    The student fixes architecture, sample rate, gains, initial offsets, and performance targets.

  2. 02
    Check linear model

    Poles, bandwidth, damping, and predicted settling are calculated.

  3. 03
    Run nonlinear baseline

    The Simulink model acquires and tracks a clean input.

  4. 04
    Add disturbances

    Noise, frequency step, phase step, and quantisation cases are applied.

  5. 05
    Sweep design

    Loop parameters are compared for acquisition, jitter, and stability.

Demonstration scenario

A second-order digital PLL acquires a frequency offset, then receives phase and frequency steps with noise. Linear predictions and Simulink transients are compared while a bandwidth sweep shows the acquisition and jitter tradeoff.

Engineering

Technical architecture

Environment
MATLAB R2026a scripts and native Simulink R2026a model files.
Mathematical model
Discrete-time phase-domain blocks with documented units, wrapping, saturation, and noise.
Analysis
Linear transfer calculations and nonlinear time-domain measurement scripts.
Verification
Known step responses, noiseless lock cases, parameter-unit tests, and repeatable seeds.

Testing

Evaluation

Evaluation measures

  • Pole and bandwidth calculation correctness
  • Acquisition and settling-time agreement with prepared reference cases
  • Steady-state phase and frequency error
  • Jitter variance and spectral response under injected noise
  • Cycle-slip and loss-of-lock thresholds
  • Sensitivity to gain, delay, quantisation, and sample rate

System boundaries

  • Requires MATLAB R2026a and Simulink R2026a licences.
  • No GNU Octave model is included.
  • The project is a behavioural simulation and excludes transistor-level, layout, and hardware parasitics.
  • Results apply only to the documented architecture and parameter ranges.

Included

  1. 01MATLAB analysis scripts and Simulink model files
  2. 02Phase detector, loop filter, oscillator, divider, and lock modules
  3. 03Acquisition, error, jitter, spectrum, and stability plots
  4. 04Prepared loop configurations, disturbances, and results
  5. 05Complete source code in a private GitHub repository
  6. 06Complete project documentation with synopsis, abstract, methodology, PLL block diagrams, equations, simulation results, screenshots, and conclusion
  7. 07Setup and usage guide

Project record

No buyer information is collected on this page.

Permanent project ID
GP-EC-14MY5XP
Catalogued
22 Aug 2026
Completed
Pending
Verified
Pending
Demonstration
Added when ready

Handover

After purchase

  1. 01
    Payment is confirmed

    The project is marked unavailable and cannot be purchased again.

  2. 02
    Repository access is granted

    The buyer's submitted GitHub account receives access to the private repository.

  3. 03
    The purchase record is delivered

    The certification sheet is prepared from the reviewed buyer details and sent privately by email.